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IRS26302DJ
Figure 7: Illustration of deadtime
Matched Propagation Delays
The IRS26302DJ is designed with propagation delay matching circuitry. With this feature, the IC’s response at the
output to a signal at the input requires approximately the same time duration (i.e., t ON , t OFF ) for both the low-side
channels and the high-side channels; the maximum difference is specified by the delay matching parameter (MT).
Additionally, the propagation delay for each low-side channel is matched when compared to the other low-side
channels and the propagation delays of the high-side channels are matched with each other; the MT specification
applies as well. The propagation turn-on delay (t ON ) of the IRS26302DJ is matched to the propagation turn-on delay
(t OFF ).
Input Logic Compatibility
The inputs of this IC are compatible with standard CMOS and TTL outputs. The IRS26302DJ has been designed to
be compatible with 3.3 V and 5 V logic-level signals. Figure 8 illustrates an input signal to the IRS26302DJ, its input
threshold values, and the logic state of the IC as a result of the input signal.
Figure 8: HIN & LIN input thresholds
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19
? 2009 International Rectifier
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